1. Field of the Invention
The present invention relates to a semiconductor device and particularly to a semiconductor device including an output buffer capable of impedance adjustment.
2. Description of Related Art
A semiconductor device, such as DRAM (Dynamic Random Access Memory), includes an output buffer for outputting data to the outside. The output buffer is so designed that it has a desired impedance when activated. However, the output buffer does not always have the design-based desired impedance because process irregularities and temperature changes affect the output buffer's impedance. For this reason, a semiconductor device required to precisely control the impedance of its output buffer has a built-in impedance adjusting circuit, which is called calibration circuit.
The calibration circuit is configured such that a replica unit identical in circuit configuration with a pull-up unit included in the output buffer is connected to a calibration terminal. The calibration circuit performs calibration by controlling the impedance of the replica unit so that a potential at the calibration terminal matches a desired voltage level and reflecting the controlled impedance on the pull-up unit of the output buffer.
The output buffer may be used as a termination resistor when a write operation is carried out. When the output buffer functions as the termination resistor, the impedance adjusted by the calibration operation is used as the impedance of the output buffer (Japanese Patent Application Laid Open No. 2008-228276, also published as U.S. Pat. Pub. No. 2008-0219068).